Session 8 - Wireline Clocking Techniques
8-1 A 5GHz 245fsrms 8mW Ring Oscillator-based Digital Frequency Synthesizer ( A. Khashaba, A. Elkholy, K. M.Megawer, M. Ahmed, P. K. Hanumolu)
Presentation Quality
Best
Technical Quality
Best
Comments:
8-2 A 2-to-20 GHz Multi-Phase Clock Generator with Phase Interpolators Using Injection-Locked Oscillation Buffers for High-Speed IOs in 16nm FinFET Resolution (Sanquan Song*, John Poulton**, XiChen*, Brian Zimmer*, Stephen G. Tell**, Walker J. Turner**, Sudhir S. Kudva*, Nikola Nedovic*, John Wilson**, C.Thomas Gray**, and William J. Dally*)
Presentation Quality
Best
Technical Quality
Best
Comments:
8-3 A 14-GHz Bang-Bang Digital PLL with sub-150fs Integrated Jitter for Wireline Applications in 7nm FinFET ( D. Pfaff, R. Abbott, X. Wang, B. Zamanlooy, S. Moazzeni, R. Smith**, C. Lin)
Presentation Quality
Best
Technical Quality
Best
8-4 A 5GHz 200kHz/5000ppm Spread-Spectrum Clock Generator with Calibration-Free Two-Point Modulation Usinga Nested-Loop BBPLL (Xiaohua Huang, Kunnong Zeng, Yuguang Liu, Woogeun Rhee, Taeik Kim)
Presentation Quality
Best
Technical Quality
Best
Comments:
8-5 Voltage-Follower Coupling Quadrature Oscillator with Embedded Phase-Interpolator in 16nm FinFET ( X. Chen, S.Song, J. Poulton, N. Nedovic, B. Zimmer, S. Tell, C. Gray)
Technical Quality
Best
Presentation Quality
Best
Comments:
8-6 A 1.5pJ/bit, 5-to-10Gbps Forwarded-Clock I/O with Per-Lane Clock De-Skew in a Low Power 28nm CMOS Process (A. Jose, V. Abramzon, M. Elzeftawi, M. Wang, K. Kim, Y. Song, S. Moballegh, J. Kamali, A. Amirkhany)
Technical Quality
Best
Presentation Quality
Best
Comments:
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