3D-SiP Technology Seminar Registration Form 論壇報名表
Forum Information 論壇資訊
Innovative heterogeneous integration 3D-SiP packaging techniques, such as 3DIC TSV, Fan Out, CoW(Chip on Wafer) or WoW(Wafer on Wafer) hybrid bonding, can effectively provide the solutions for two key limitations of AI (Artificial Intelligent), including IO memory bandwidth and high thermal budget restrictions.
By the way, 5G(with mm-wave high data transition features) can also effectively enable AI life and can be realized by the packaging technologies, such as SiP, Fan Out, 2.5D/3D TSV, and CoW/WoW hybrid bonding.
In this forum, we will address on product applications, equipment & material technology solutions in 3D-SiP advanced packaging and have invited lots of experts to share their treasure experiences on future technology development roadmap, challenges, and effective packaging solutions.
-- Addressing on advanced wafer level packaging technologies, including Fan Out, and 3DIC, TSV, and CoW/WoW Hybrid Bonding TECH solutions.
-- Addressing innovative Equipment, Materials, Metrology, and so on technology solutions.
-- Addressing on Si-interposer, and HMC/HBM, and so on 3D-SiP packaging schemes.
Agenda is subject to change. 議程若有異動以現場公告為準.
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