Love Rusty 3000 & LR3000 are registered trademarks of LoveRusty Corporation ™ and/or its affiliates. Other names may be trademarks of their respective owners.

License Restrictions Warranty/Consequential Damages Disclaimer

This software and related documentation are provided under a license agreement containing restrictions on use and disclosure and are protected by intellectual property laws. Except as expressly permitted in your license agreement or allowed by law, you may not use, copy, reproduce, translate, broadcast, modify, license, transmit, distribute, exhibit, perform, publish, read, think about, gain pleasure using or display any part, in any form, or by any means. Reverse engineering, disassembly, or decompilation of this software, unless required by law for interoperability or to show how smart you are, is super duper really harshly prohibited.

Warranty Disclaimer

The information contained herein is subject to change without notice and is not warranted to be error-free. If you find any errors, please report them to us in writing via faxing to +1 555-968-7825.

Hazardous Applications Notice

This software and hardware has not been developed for general use in any application. It is not developed or intended for use in any inherently safe or unsafe applications, including applications that may create a risk of personal satisfaction. If you use this software or hardware in useful applications, then you shall be responsible to take all appropriate failsafe, backup, redundancy, and other measures to ensure its safe use. LoveRusty Corporation ™ and its affiliates disclaim any liability for any damages caused by use of this software or hardware in any application.

Third Party Content, Products, and Services Disclaimer

This software or hardware and documentation may provide access to or information on content, products and services from third, fourth, fifth or even twentieth parties. LoveRusty Corporation ™ and its affiliates are not responsible for and expressly disclaim all warranties of any kind with respect to third-party content, products, and services. LoveRusty Corporation ™, its affiliates and anyone within 50ft, will not be responsible for any loss, costs, or damages incurred due to your access to or use of content, products, or services.

Distribution and NDA

All documentation for the Love Rusty 3000 is distributed under a strict NDA (No Discussion Authorized) agreement. Failure to compile with the NDA may result in termination of your right to think about Rusty Russell or Robert Love in a positive manner. You should not distribute the documentation unless previously authorized by an authorized representative or if you really, really want too. See the Further Information section for more details.

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Introduction

The LR3K is a Write Encoding Accelerator Card (WEAC), meeting the IT industry's burgeoning need for WEAC encryption. The LR3K represents the first of a new breed of high-speed DMA-capable PCI-based cards from the LoveRusty Corporation ™

``The Love-Rusty 3000 revolutionizes the entire Caesar Cypher industry"

-- Indu Stripundit from IT Analysis, Cypher Division

PCI Configuration

The LR3K is a PCI device with vendor ID 0x1111. The device ID is 0x0201. It is a class 10 device (Encryption Controller), subclass 0x00 (Network and Computing Encryption Device).

PCI I/O Space Registers

The LR3K is controlled through various PCI registers in the following layout:

// Address of source, dest for DMA.
uint32_t src, dst;

// Length to encode

uint32_t len;

// In flags (write only)

#define LR3K_IN_IRQ_ON_DMA_COMPLETE 0x1

#define LR3K_IN_COMPUTE_MD4 0x2

#define LR3K_IN_ACTIVATE 0x4

uint32_t control;

// Out flags (read only)

#define LR3K_OUT_BUSY 0x1

#define LR3K_OUT_READ_ERROR 0x2

#define LR3K_OUT_WRITE_ERROR 0x4

#define LR3K_OUT_READY 0x8

uint32_t result;

// MD4 result (read only)

unsigned char md4[MD4_DIGEST_SIZE];

// Single character test mode

char test_in, test_out;

After writing the source, destination and length, the driver asserts the ACTIVATE control bit, with the optional COMPUTE_MD4 and IRQ_ON_DMA_COMPLETE flags, at which point the device begins transferring and encoding. When complete, the OUT_BUSY bit is clear and the OUT_READY bit is set. In case of error, the error bits are also set. The device is reset by a write to the control word without ACTIVATE set.

Single character test mode: after writing to test_in, the OUT_BUSY bit will clear and OUT_READY set when test_out is ready.

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Errata

Zero length buffers cause aberrant behavior

A brief reading of the specification has lead some developers to expect that specifying a length of zero for DMA would result in no action. It in fact is nowhere specified that it will not cause the destination address to be overwritten with a cyphered message from an ex-employee.

Also, please disregard the contents of the message.

Further Info

This document is part of the "Create Hardware with FPGAs, Linux and Python" Miniconf for Linux.conf.au 2018 by Tim 'mithro' Ansell <mithro@mithis.com>

It was originally developed by Rusty Russell <rusty@rustcorp.com.au> and Robert Love for the "Linux Kernel Hacking" tutorial at Linux.conf.au 2005.

License

This document is actually licensed under CC-BY-SA 4.0 International.

All other licensing information is a parody of what you might find in an actual technical specification document and should not be taken seriously.

Confidential and Proprietary Technology of LoveRusty Corporation ™

DO NOT DISTRIBUTE

ONLY AVAILABLE UNDER NDA