DIGITAL CIRCUITS AND SYSTEMS |
Main lecturer Mail address Phone number | MADEC Morgan morgan.madec@unistra.fr, office B204, +33 (0)3 68 85 44 28 | |
Other lecturer(s) | “N/A” |
APOGEE code Track - Year - Semester - Option Coefficient = ECTS Duration | EP012M91 Engineer - 2Y G - I2S - S8 Master - 1Y ASI G + HCI - S2 1.5 / 2 10h CM, 8h TP |
EXAMS Duration Authorized documents If yes, which ones : School calculator authorized | Session 1 Report on a project Yes / No Yes / No | Session 2 to complete Yes / No Yes / No |
Prerequisites
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Lecture goals The aim of this lecture is to go deeper in the design of digital circuits by including temporal aspects as design constraints (asynchronism, critical path, operating frequency) as well as advanced notions in circuits optimization (parallelism, pipelining, resynchronization...) | ||
Detailed outline The lecture is composed of four main parts :
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Applications The lecture will be illustrated by practical examples performed on FPGA. The practical works is a 8-hour project . Your goal is to optimize an arithmetic operator on a FPGA. Resources for this project are a FPGA development board and an access to Quartus II. | ||
Acquired skills
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