Battery Management System
Resources
- StackExchange on cell failures in parallel battery packs
- This is a great starting place for a general overview of lithium ion batteries in space application
Radiation Considerations
- Single Event Burnout (SEB/SEBO)
- Susceptible when in the off state, caused by an ion causing a transient current which turns on the parasitic bipolar structure of the fet. This can lead to a feedback current which increases until the fet blows up.
- SEB is lower for P-Channel than for N-Channel power mosfets
- Increasing temperatures lowers chances
- Reduced source-drain bias lowers chances
- Single Event Gate Rupture (SEGR)
- They kill everything there’s nothing we can do!
- Except reducing the source-drain bias
- Total Ionizing Dose (TID)
- Long term effects of radiation on components, usually expressed in rad’s or Grays (100 rads)
- Two main failure effects
- Charge build up (specifically on the gate)
- Defect activation
- Annealing (heating of the device)
- It seems that P-channel CCD’s (charge-coupled devices) do not typically undergo annealing and Vth tends to decrease on an exponential curve as TID approaches 90krad
- N-Channel devices
- Initially Vth might decrease but over time half of the radiation effects will be repaired by annealing. While this sounds like a good thing eventually Vth will net increase over time which could be a real problem. Namely Vth can become higher than the possible output of the gate driver.
There are two critical things to consider for our MOSFET’s. The TID and SEE effects. We are pretty well at the mercy of both the SEE and TID effects because the best solutions are technology solutions (and for the sake of this paragraph we’re focusing on using COTS parts). We can however design the circuit to degrade in the fashion that we choose.
N-Channel device’s eventual failure mode is open and over time we will lose the ability to drive the gate and our batteries will be disconnected. P-Channel devices failure mode is a short, where very small or zero voltage will be required to turn the device on. If we end up going with a fuse between the battery output and power bus P-Channel devices seem to be the best route.
To reduce the chance of catastrophic SEE’s we can increase the temperature that we run the board at (heater?) and/or we can lower the drain-source bias (derating).
Acknowledgements
- Phone call with Doug and looking into specs of a battery/chemistry.
- Hosted a meeting, connections and a sweet tour!
Current Block Diagram

Power Path:
Dual ideal diode:
http://www.linear.com/product/LTC4413
http://www.linear.com/product/LTC4415
Part Selection and Consideration
- Nice find andrew
- -40~85C max temp
- I2C
- 7uA operating
- This has a software based shutdown which is neat.
- How much Discharge is too much
- Total resistance tolerated across both
- Suggested 100mv/4A = 25mΩ
- Find Charge current overthreshold
- We don’t care, we can never provide enough current to over charge them.
- Find worst case RDSon
- Imax should be high
- Suggested >50A to handle SS
- Recommended 5Mohm across gate source to get rid of any charge
- Vdss = 25V
- Drive voltage from 2.5 -8 V
- Current limiting
- Filters noise
- Calcs According to TI, assuming 3.7V, Fast Mode Operation
- Rmin = 1100Ω
Ideal Diodes
- Automotive rated
- External switch
- P-channel
- Voltage rating is -0.3-36V so this would be the better choice for “derating”
- Lower temp
- Internal switch
- P-Channel
- Voltage range is from -0.3-6V
P-Channel Mosfet
- With a worst case of 4.2V and 2C discharge rate we can expect the maximum power to be approximately:
- 4.2V * 4.4 A ~ 17 W
- Rdson = 0.02V/4.4.A = 4.5mΩ
- Between Vin and Vgson Vin is going to be smaller with a worst case of 3Vish and best case of 4.2V
- This will never happen but we are going to select FETs as if it would.
- FDD306PCT-ND
- Up to 52W dissipated but requires large footprint
- Rdson is 21 mΩ best case
- RDson between 3 and 6 mΩ between -2.5-4.5V
- 42W max power dissipation
- Max Vds = -20V
- -55-150°C
Inverter
- 1uA quiescent
- -55 to 125 Temp range
- 2-5.5V Supply
- 0.5-1.65V logic low
- 1.5-3.85V logic high
- Assuming this will degrade over time this seems to be the better option.
- 1uA Quiescent
- -55 to 125 Temp
- 2~5.5V Supply
- 0.3~1.1 V Logic low
- 1.7~4.4V Logic High
Shutdown
- Provider requires low side and high side disconnect from battery to (two high one low).
- The circuit must be independent of the RBF.
- RBF means before flight from Earth to LEO.
Batteries:
After exploring the possibility of using LiFePo4 we had initially made the assumption that these batteries were more resilient to cold temperature charging and after investigating the assumtion found that we were wrong. Since the trade-off of energy density is considerable we conducted another study of Li-ion batteries and decided on LiNiMnCoO2 (NMC) cells.
Final Battery Selection (LG HG2)
- Pack configuration 2s2p
- LiNiMnCoO2 (NMC) Chem
- 3.6V @ 20A max discharge
- 3000mAh
- -5-50°C Charge,-20-70°C
(OLD) Moving to LiFePo4 Chemistry due to safety considerations. Can’t find cells that match the pouch requirements for our card form-factor so thinking of switching to cylindrical cells.
- Four per card x2 cards taking 4 card slots.
- 65mm x 18mm
(OLD) Batteries need to be no more than 4mm tall 50 mm wide and 76mm long to fit in the card holder.
- Looking at 1.5 Ah (it’s huge)
- Holy crap it’s huge
- 3.5mm thick
- Just kidding design specs be damned
- This might be the winner as it looks as if it’s been used/tested in nano sat’s
- Not UL listed
- UL Listed
- 2C
- 3A max discharge
- Can do 2 in parallel.
- 2 Ah
- 4A max discharge
- 60 x 50 x 6 mm
- UL listed?
- Same as above but need to double check.
- It is
- We save 1mm Z going with this chip
- 1500mAh
- Roughly 60 x 60 x 5.5
- 4A max discharge
- 2A max charge
- 2000mAh
- 63 x 45 x 7 mm
- 4A Max discharge
- 2A max charge .4A nom
- 60 x 50 x 5.8 mm
- 2Ah
- Are you UL listed? Please be UL Listed.
- We asked if they are UL listed.
- They are not.
- 6A max discharge
- 1200mAh nom charge
- 68x50x6 mm
- 6Ah!!!!!
- Are you UL listed? Please be UL Listed.
- They aren’t.
- 603450 Please Spec this! It gives us 2000mAh
- Not UL certified
- This supplier doesn’t seem to want to budge on the MOQ
Chargers:
Currently we are scrapping an IC battery charger and opting to use the solar module to charge the batteries directly.
- Constant Currnet/Voltage Charger
- 5uA quiescent when no input
- 4.5V min input
- Can we find one that works for single cells?
- And we don’t need cell leveling
- Single Cell
- 3-Phase Charge
- Thermal management
- 4.2V
- 1A nom input
- Internal N-Fets for low side shutoff.
- Maybe we can parallelize them
- Just need a fuel gauge to make this chip work
- Linear
- Power path control
- LDO mode can operate with shorted or missing battery
- Thermal management
- Up to 2.1A Vsys
- Vsys regulated between Vbatt and 4.3V
- Vin from 4.0 to 6.7V
- ADP5063 for automotive
- ADP5065 adds a 3MHz synchronous buck converter
- Very simple, no power path management
CHG/DCHG Diodes
- Extremely low leakage: 500 pA
- -65°-150°C
Microcontroller:
- Look at .5 rev LGR for layout
- Still using STM32 mcu
- Stay away from 436MHz
Temperature Sensors
- I2C 3 bit addr
- 2.7-5.5V Supply
- 100nA shutdown mode
Fuel Gauges
- Multiple cells (2 series)
- Coulomb Counter
- Cell Undervoltage Protection
- Cell Overvoltage Protection
- Overcurrent in CHARGE Mode Protection
- Overcurrent in DISCHARGE Mode Protection
- Overload in DISCHARGE Mode Protection
- Short Circuit in CHARGE Mode Protection
- Overtemperature in CHARGE Mode Protection
- Overtemperature in DISCHARGE Mode Protection
- Precharge Timeout Protection
- Fast Charge Timeout Protection
- Requires two diodes?? Maybe doesn’t matter look at power consumption
- -40-85 C? 105?
- Single cell
- 93 uA Operating, 21 uA sleep mode, 9uA Hibernate .6 uA shutdown
- Doesn’t look like it requires outside diodes
- Look into performance as temp → 1 billion C
- I2c
- -40 - 100 C
- Integrated LDO (2.5V)
- Reports SOC and time to empty
- Configurable SOC interupt
- Battery aging (approx)
- 4uA in hibernate 103 uA in ‘Normal’ mode
- 32 Bytes flash
- Fuel gauging with temp/v/i
- 96 bytes NVM
- -40-85 (100) C
- I2c
- Integrated LDO
- 1 uA hibernate 100uA Normal mode
- Holy crap it’s tiny 5 pins
- Guaranteed to VBatt >= 1V
- 3.2-4 uA operating
- This does not give us temperature which we need.
- It has no brains Yay!
- It has no brains! Drat (no i2c)
- Open Drain or Push-Pull output (what is this?)
- -40-85C 150 C max jct temp
- I2c
- 100uA (holy crap) operating, 2 uA in standby mode
- 1% accuracy
- Nice find andrew
- -40~85C max temp
- I2C
- 7uA operating
- Supposedly tracks SOC much more accurately and doesn’t require a reset condition to maintain battery modelling. If this is true this is a great chip.
- This has a software based shutdown which is neat.
- 3 uA operational
- I2c
- 7.5 mV accuracy
- We get temp and SOC
- It’s thin and sexy but that footprint…
- Damnitall it isn’t a real coulomb counter
- Programmable Over/Under voltage
- Over current discharge
- Temperature
- 100C max temp
- Why is this chip so good? But 400uA normal mode current consumption
Cell Protection:
- 2 Series
- Cell balancing 30mV → 0mV nom
- Overvoltage control
- Overvoltage charge inhibit
- Overcurrent charge inhibit
- Undervoltage discharge inhibit
- Overcurrent discharge inhibit
- Charge inhibit for Vbat < ~500mV (want to test this)
- 5.5uA NORMAL mode consumption
- -40 to 85 C operating
- 400 - 250 uA operating
- 90 -38 uA sleep mode!!
- 1uA operating current
- 10mV accuracy
- -65 to 110 C
- 4 uA in NORMAL mode
- over/under voltage
- SC
- Over Current (charge/discharge)
- Zero voltage charging?
- We don’t like this as much because it wants us to disconnect power to the Cell as one of its reset conditions.
- It operates at 6 uA
- Operates on over-current prot
- -40 ti 100C
- Similar to the BQ297xx, but with integrated common drain NFETs
TODO:
Meeting Notes 11/17/2017
- Remember to check DRC when moving to 4 layers.
- Move signals (now yellow) to top and bottom.
- Layer 2 is a solid ground plane.
- LED’s would be nice. (look at semtech protocard).
- Add holes in corners from protocard
- Swap 2x6 debug pinn to 1x12 in protocard
Meeting Notes 10/29/2017
- Change 10 pin debug connector
- Select THermister
- Select Fuse
- CHange heater fet to P-Channel
- Start Layout
Meeting Notes 09/25/2017
Present: Austin, Evan, Andrew
- Design review yay!
- Double pin header between board and backplane. Short on bottom in case we don’t want to stuff the headers.
- Double connection for each pin (ie in groups CanL 1 and 2 for ex.)
- Four pins for batt close to ground, 2nd ground close CANL
- VBATT > GND > SYSSHD
- Upgrade to eagle 8, can dl sparkfun libraries, goodpower supply pins.
- Stop running wires and use pins
- Silicon diode on chg dschg.
- Status pins on Ideal diodes, connect series blocks.
- Jumper On board battery/Exernal battery for 3.3V, 3 pin. Pin 1&2 shorted pin 3 external option.
- Look into standardized debug connector.
- Mosfets to Q$ TP$
- Graphic: put syshd fets in line with VBatt-
- Follow up design review Thursday at 10:00 GMT.
Meeting Notes 06/01/2017
Present: Austin
- Batteries have been ordered!
- Worked on getting test environment on BBB and initial probing of STM microcontroller.
Meeting Notes 05/25/2017
Present: Austin
- Wrote researched batteries. UL listing is a fairly tough requirement
- Found two cells that work, but both will be problematic.
- Single 4A max discharge 2Ah cell with normal charge 400mA
- Parallel 3A max discharge 1.5Ah cell with normal charge of 300mA
Meeting Notes 05/18/2017
Present: Austin
- Hunting for a battery. Wrote several emails to distributors on potential cells.
- Ruled out anything from adafruit/sparkfun. They do not UL list any of their batteries.
- High output cells for batteryspace are all not UL listed.
Meeting Notes 05/11/2017
Present: Haneef, Austin, Mark, Mike
- Phone Call with Doug from Polaris Battery Labs
- Need Power Budget, required storage and size of battery to determine C-rate and capacity. Send to Doug no later than tomorrow.
- Come up with a few times to go over there and meet with him.
- Requested next wednesday (17th) from 12:00-3:00
- Need to compute component values for STC and ADP.
- Need to find C-rate for our battery.
- Need to finish shutdown circuitry.
- Need to create some kind of resistive heater.
Meeting Notes 05/04/2017
Present: Haneef, Austin, Mike
- Looked at preliminary schematics and board
- The battery we had looked at is too large. We have found replacements but nothing bigger than 800Ah.
- Austin wrote a letter to Polaris Battery Labs in Beaverton looking for some help.
- There are several issues listed in this doc for each chip
- We need to go through each chip and compute and select component values
- Right now a lot of that depends on the max discharge rate of our cell.
- We need much more accurate drawings in eagle for the card shape of the board. Maybe Marie is working on them?
- We need to talk to other boards and find if there are 4 other boards willing to live with less head room in exchange for more than 800mAh of battery storage
- We think we need 1Ah+ per battery to stay alive. Hopefully Polaris will hook it up.
Meeting Notes 04/20/2017
Present: Haneef, Austin, Mike
- BQ chips are basically a no go. They all use impedance tracking as opposed to actual coulomb counting.
- Haneef is going to look into low power consumption adc’s to perhaps implement a coulomb counter
- For now we are sticking with the STC 3100 for fuel gauging
- Austin thinks it would be cool to do some power modeling based on a spinning and find a way to store that data. Python anyone?
- Can’t run a 3.3V bus on the backplane. Sad day.
- Also can’t pull 3.3V from solar boards.
- So maybe we can look into the buck on the ADP50**
- What are we doing over the next week
- Austin: I’ll make parts in eagle for current parts
- Haneef looking into low power adc’s
Meeting Notes 04/13/2017
Present: Haneef, Austin, Mike, Joe
- We got physical drawings before anyone else did.
- The 2s2p configuration doesn’t seem to work. Namely for the batteries in series we would need to generate 8.4V to charge the second cell in the series.
- The CP doesn’t interrupt the output so we’re probably stuck with a bunch of diodes.
- ADP5065 Has a 3Mhz 3.3V buck
- Pull from Solar board
- Can we get a dedicated 3.3v rail on the backplane
Meeting Notes 02/16/2017
Present: Haneef, Austin
- Need to switch on/off ZETA
- Input Output Power simulations
- Measure and manage noise generation
- It would be cool if we found a CP chip to do this for us.
- Can we connect our PV and VBatt voltages
- Run back through Zeta convert
- Dump them into each other and hope for the best
- No we are running 2s2p so there has to be a different VBatt bus
- Do we actually need 5 volts or can we program the Z to run at 3.4...ish
Conclusion
- Worked through circuit ideas.
- Ruled out using HEMT’s, JFET’s
- MOSFets are possible but painful because they use more power than BJT’s
- Research CP chips to find out what is out there.
- What are the obstacles (what is blocking progress)?
- We could use some specs of other boards to find out how much voltage we can play with.
- We don’t know if 5V output is a hard requirement
- What are you waiting for or going to wait for (Limiting Factor(s))
Meeting Notes 02/09/2017
Present: Haneef, Austin
Output from VBatt
- We probably don’t want to tie the VBatt directly to PVout
Microcontroller
- Can we use a lower power mcu?
- MSP430 Series
- Shitty to use
- Max power 80 uA on 660 nA off
- Max Power 58.7 mA at 80Mhz and 105C
- Haneef has used this before
- Or are we stuck with the STM
- Other considerations. We need PWM at 8 Mhz and enough power to drive the FETS on the Zeta Converter (for another time)
Conclusion
- Discussed MCU replacements
- Looked at possible circuitry
- Discussed next steps
- Find a lower power solution or burn half our power before we ever send it to the satellite.
- Apparently we can put the STM to sleep and the PWM’s will keep running which shaves us 90% current draw.
- What are the obstacles (what is blocking progress)?
- PWM Generation and Mosfets (zeta)
- Time
- What are you waiting for or going to wait for (Limiting Factor(s))