Z80-Based Breadboard Computer

Memory Map

Memory Address Decoding Table

Peripheral Address Space Decoding Table

Address Decoding Logic

Peripheral Decoding

Memory Decoding

Control Signals

MEMRD / MEMWR

Build Photos

Day 1

Day 2

Day 2.5

Day 3:

Reset Circuit

Software

Bootloader/Monitor:

References/Resources

Datasheets

Next Digikey order

Next Mouser Order:

Split order with Stephen (July 28):

Memory Map

In the 64Kbyte memory address space, the EEPROM occupies the lower 32Kbytes while the RAM occupies the upper 32Kbytes.

In the peripheral address space, the following peripherals have addresses decoded:

Memory Address Decoding Table

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

A

0

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

B

1

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

This decoding circuitry is active when MREQ is pulled active-low, IORQ remains high.

(EEPROM is A, RAM is B)

(EEPROM datasheet:

http://www.digikey.ca/product-detail/en/AT28C256-15PU/AT28C256-15PU-ND/1008506)

(RAM Datasheet:

http://www.alldatasheet.com/datasheet-pdf/pdf/101650/SONY/CXK58256.html)

Peripheral Address Space Decoding Table

Bold columns indicate which address lines go through the 74138 decoder.

7

6

5

4

3

2

1

0

(C)SIO1

0

0

0

0

0

0

X

X

(D)SIO2

0

0

0

1

0

0

X

X

(E)CTC

0

0

1

0

0

0

X

X

(F)IDE

0

0

1

1

0

X

X

X

(G)Disp

0

1

0

0

0

0

0

0

This decoding is active when IORQ is pulled active-low, MREQ remains high.

Address Decoding Logic

Peripheral Decoding

Memory Decoding

I originally hoped to do this with a single logic chip. I first tried a quad NOR gate chip, then a Quad NAND. With the NAND, the chip was one gate short from completing my desired function ( f=A * M’ * I). After a bunch of brainstorming, I had a brainwave and decided the lowest chip-count way of doing it was to make use of the handy enable gate on the 74138. My digital logic prof would be disappointed (it’s not the most elegant solution), but it is the simplest to wire up :)

Control Signals

MEMRD / MEMWR

The Z80 has two active-low lines denoted as RD, WR. In order to interface with my RAM and EEPROM, I have to use the following scheme to tie to the OE, WE lines.

On the breadboard, this is implemented in the 7432 directly below the Z80.

Build Photos

Day 1

Wired up EEPROM/RAM. In this photo, two identical Sony CXK58256 SRAM’s are used. The EEPROM has an identical pinout. As a result, one of the RAMs is simply a placeholder IC.

Day 2

Wired up address decoding. Because I don’t have an SIO kicking around, I’m using a spare 40-DIP chip in it’s place as a dummy.

Day 2.5

Wired up data bus to SIO. OE and WE wired up to RAM and EEPROM. IOREQ and MREQ wired up to peripheral-decoding 74138.

Day 3:

Wired up the rest of the control signals to the SIO. Placed the Max232 on the breadboard. Wired up the reset button using a bunch of series resistors. Tomorrow I’ll replace them all with a single 4.7k resisistor.

Placed a digikey order tonight to get caps needed for max232 as well as crystal oscillator.

Day 4

Finished wiring up MAX232. Replaced clock circuit with 8 MHz crystal oscillator. Wired up DB9 connector.

Reset Circuit

I am using the reset circuit on http://searle.hostei.com/grant/z80/SimpleZ80.html#Maps.

However, I did not have a 2k2 ohm resistor in my bag of goodies, so I put several resistors in series:

Red - Red - Brown

220

Blue - Grey - Brown

680

Green - Blue - Brown (x2)

560 (x2)

Brown - Blue - Brown (x2)

160 (x2)

Theoretical Total Resistance:

2340

Experimental Total Resistance:

2190

Software

Z80 TASM is originally big endian.

Hexdump in the command line shows little-endian format.

Bless shows the actual contents of the file, which is big-endian.

Bootloader/Monitor:

Copies firmware burner from EEPROM to RAM, jumps to it. This program then waits for a specific control sequence on the SIO to indicate a new EEPROM is to be burnt. The program then uses the Z80 to transfer the new image to the ROM.

References/Resources

8-bit IDE Interface

http://www.retroleum.co.uk/electronics-articles/an-8-bit-ide-interface/

CP/M Computer

http://searle.hostei.com/grant/cpm/

Simple Z80 Computer

(Handy for hooking up clock and MAX232)

http://searle.hostei.com/grant/z80/SimpleZ80.html#Maps

3-state buffers

http://cpuville.com/three_state.htm

Crystal Oscillator Circuits

http://www.z80.info/uexosc.htm

Datasheets

Next Digikey order

Next Mouser Order:

SIO/2:

http://ca.mouser.com/ProductDetail/ZiLOG/Z84C4208PEG/?qs=%2fha2pyFaduivyylb8L%252b29vNH6USbMOSA3Mjb6r8iNthu8%2f7ENRw6sQ%3d%3d

Split order with Stephen (July 28):

http://www.digikey.ca/product-detail/en/AT28C256-15PU/AT28C256-15PU-ND/1008506

http://www.digikey.ca/product-detail/en/Z84C0008PEG/269-3895-ND/929205

http://www.digikey.ca/product-detail/en/Z84C4208PEG/Z84C4208PEG-ND/929024

8mhz crystal

misc caps for max232

perfboard

Later:

http://www.digikey.ca/product-detail/en/Z8S18020PSG/269-4301-ND/928984