PLAN for 5 weeks from July 11 to 14 August for the post-midterm GSoC period.

July 11 - July 17 :

Get port information from the symbol files with their placement. (3)

Set ports in the nets based on placement coordinates. (2)

If there is any node named at the position, set the same port value. Else, create a new name for that node. (2)

July 18 - July 24 :

Post processing of nets as outlined in the wiki[1] : (3)

“Go through all nets and check all the nodes(except those the net ends in), if they are on that net. If True, create a net from the node to one of the end-nodes of the net”

Test if printing in verilog is done correctly and modify if needed. Try to print the ifdef directive correctly for conversion from gschem files. (4)

July 25 - July 31 :

Print in gschem format, triggered by the command ‘list’. (7)

-print_component / print_module (4)

-print_net (2)

-print_comment? (1)

August 1 - August 7 :

        Documentation of each function in the wiki as well as checking it in the code.

        Testing using circuits and finding bugs.

August 8 - August 13 :

        Buffer week

August 13 :

Suggested pencils down date

August 13 - August 20 :

More tests to run and bug fixes. Final documentation

August 21 :

Firm Pencils down date

[1] : gnucap.org/dokuwiki/doku.php?id=gnucap:user:language_plugin_for_gschem