1. Instructor
  2. Text
  3. Grading
  4. Important Dates
  5. Lectures
  6. Course Supplement
  7. Homeworks
  8. Labs
  9. Teaching Assistants and Grader
    1. Discussion Sections
  10. Resources

EE316 - Fundamentals of Logic Design

Spring 2010: meets MWF 900-1000 in ACA 1.104; unique number is 16055


This course aims to study the design of digital hardware, specifically the problem of realizing computation with logic gates.  


Prerequisites: EE306 or CS 307, and credit/registration for EE312 or CS310.


We will begin by reviewing basic facts about binary arithmetic and Boolean logic. This will be followed by an in-depth study of combinational logic design, starting with implementation general logic functions with NAND-NOR gates, followed by specific design styles for muxes, decoders, and programmable logic, and then an introduction to design using the VHDL hardware description language.


Next we will study the design and implementation of sequential logic.  Specifically, we will study the basic building blocks in the form of latches and flops, and clocks.  We will then study how to design, optimize, and test general sequential circuits using state charts as well as VHDL. 


We will conclude with survey level treatment of arithmetical circuits, and system level design with VHDL.


All departmental, college and university regulations concerning drops will be  followed. The University of Texas at Austin provides upon request appropriate academic adjustments for qualified students with disabilities. For more information, contact the Office of the Dean of Students at 471-6259, 471-4241 TDD. 

The contents of this page will change over time; e.g., I may change lecture topics and homework/lab problems. Some material (such as updated versions of the software) as well as announcements, and the online forum will be at Blackboard - you can reach the blackboard page for the class by clicking here.

Instructor

Text

Fundamentals of Logic Design, 6 Edition, by Charles Roth and Larry Kinney. The latest edition of the text is required. The best price I can find is $143.95 $151.15 (1/15/10) at Amazon.com. The book includes a CDROM with software that you will need to perform the labs - it runs on Windows XP and Vista.

Known errors in the book.

Grading


The first midterm will be based on material covered up to the date of the midterm, the second midterm will cover material starting after the first midterm and up to the date of the midterm.  I may possibly cover less, and will post an explicit list of topics before exams. The final will be comprehensive, with an emphasis on topics covered after the second midterm. 

Grades will be entered on blackboard - please monitor your scores there. Also, read this note detailing regrade policies.

Possession of hard/softcopy of a solution manual (even if it's for a prior edition of the book), or of graded homeworks from previous years will be considered cheating. The penalty will be reduction in the assigned grade for the course.

Important Dates

Test dates will not change, barring emergencies.

I will add links to the detailed exam syllabus and a sample test the week before the exam date.

HW and Lab dues dates are posted on the HW and Lab sections.

Lectures

UnitTopicDatesAdvanced Readings
Unit 1 Introduction, Number Systems and Conversion Week 1 (1/19-1/22)
Unit 2-3 Boolean Algebra Week 2 (1/25-1/29) Boolean Logic; Shannon's MS thesis. Knuth on Boolean Algebra.
Unit 4-5 Applications of Boolean Algebra; Karnaugh maps Week 3 (2/1-2/5) CNF;Exact and Heuristic 2-level Minimization
Unit 7 Multi-level logic with NAND and NOR gates Week 4 (2/8-2/12) Multilevel logic: basics; common logic extraction; design with a limited gate library. Knuth on logic circuits.
Unit 8 Design and simulation of combinational logic Week 5 (2/15-2/19) Timing Models for Logic Circuits; Circuit simulation with SPICE
Unit 9 Muxes, decoders, and PLDs Week 6 (2/22-2/26) SRAMs; CAMs, ROMs & PLAs
Unit 10 Introduction to VHDL Week 7 (3/1-3/5) VHDL Library Example
Unit 11 Latches and flip-flops Week 8 (3/8-3/12) Circuit design for latches & flops
Unit 12 Registers and counters Week 9 (3/22-3/26)
Unit 13 Analyzing sequential logic Week 10 (3/29-4/2) What I learned at Google
Unit 14-15 State graphs and tables; state minimization Week 11 (4/5-4/9)
Unit 16 Sequential circuit design Week 12 (4/12-4/16) Optimizing sequential logic Poor code: 1, 2, 3
Unit 17 VHDL for sequential logic Week 13 (4/19-4/23) Video Lecture, Latch Inference
Unit 18 Arithmetical circuits Week 14 (4/26-4/30) Advanced arithmetical circuits Video Lecture
Unit 20 Digital system design with VHDL Week 15 (5/3-5/7)

Course Supplement

A course supplement is required.  It contains material on the labs, with specific instructions on using the Xilinx board that are not available elsewhere.  It will be available from Friday 1/22/2010 Monday 1/25/2010 onwards from the Welch Copy Center.  The cost will be approximately $1.50.

Homeworks

Homeworks will be due in class on Fridays, at the start of lecture. They will be collected by the appropriate TA, and returned in class the following week. Late submissions will not be accepted.

Put your name and instructor on each page.

If you have questions about a graded homework, the TAs will have solutions, but you cannot copy them in any way. Because of widespread sharing of solutions on the web, we will not post solutions.

Here are the HW problems - they are all from the US edition of the book. The international edition that some students use number the problems differently; if you are using an international edition, you are responsible for finding out the correspondence. (The TAs have copies of the US edition of the book in lab which you can look at.)

    • HW1:  Course rules (6), 1.2 (4), 1.7 (10), 1.14 (10), 1.24 (10), 1.25 (8), 1.27 (6), 2.5 (6), 2.7 (6) (Week 2)   Skip questions related to 1s complement
    • HW2:  3.6 (6), 3.29 (6), 3.31 (12), 4.1 (8), 4.2 (8), 4.15 (8), 4.21 (6) (Week 3) 
    • HW3:  5.7 (12), 5.13 (9), 5.32 (6), 5.26(8), 5.34 (15) (Week 4) 
    • HW4:  7.2 (8), 7.21 - parts (a) and (g) only (14), 7.22 (8), 7.24 (9), 7.26 (5), 7.38 (8), 7.42 (8) (Week 5)     
    • HW5:  8.3 (6), 8.10 (4), 8.14 (5), 8.15 (4), 9.4 (6), 9.7 (8), 9.8 (6), 9.21 (12), 9.31 (9) (Week 7)
    • HW6:  10.1 (4 ), 10.4 (6), 10.9 (10), 10.21 (21), 11.2 (5), 11.3 (4), 11.6 (4), 11.14 (6) (Week 9) 
    • HW7:  12.1 (4), 12.7 (8), 12.25 (6), 12.32(6), 12.35 (9), 13.2 (2), 13.5 (6), 13.11 (10), 13.17 (9) (Week 11)
    • HW8:  14.5 (8), 14.9 (9), 14.11 (10), 14.43 (8) 15.1 (3), 15.4 (6), 15.11 (6) (Week 12)
    • HW9:  16.10 (10),17.3 (6), 17.8 (3), 17.28 (8) (Week 14) 
    • HW10: 18.4 (10), 18.20 (10),18.27 (12) (Week 15)
    • HW11: 20.2, 20.6, 20.8 (Not to be turned in - practice for finals)

    Numbers in parens denote scores for each question.

    Labs and TAs

    Here is a link to the labs page, which includes a link to a calendar with the TA sections and office hours.

    Contact Information

    NameEmail
    Chengqing Hu (TA)
    		boren.hu+316@ google 
    Ansab Ali (TA)
    		 ansabali+316 @ google
    Bhargavi Narayanasetty (TA)
    		bhargavi.narayanasetty+316 at google
    Rituraj Singh (TA)

    rsingh@mail.utexas.edu

    Hooman Rahimzade (TA)
    		hooman_rahimzade@ yahoo
    Faisal Iqbal (TA)mfiqbal@ google
    YoungTaek Kim (TA)ytkimng+316 @ google

    Boole and Claude.

    TA Responsibilities

    • Conduct office hours: I expect the complete 20 hours committed each week - 12 hours in the office, 8 hours of grading/emailing/lecture
      • Your presence is required even if no students show up 
      • If you need to travel, e.g., for a job interview, it's your responsibility to find coverage
    • Be courteous to students, help with any question (but do not give away answers)
      • If someone is rude/unreasonable, ask them to contact me
    • Respond to all emails in a timely manner
    • Collect all HWs/labs in class,
      • Grade within one week (maximum, sooner preferred)
      • Handle all regrade requests. Perform HW and lab grading
    • Prepare solutions to labs, HWs, and exams
    • Assist with exam preparation, printing, grading
      • Totaling, entering scores, generating stats
    • Maintain website: specifically, FAQ for labs and homeworks
    • Prepare short tutorials on design software
    • Attend  lectures
    • Add link to personal URL under name on table - URL should have basic contact information

    Resources